Design and exploration of neural network microsystem based on SiP

Abstract In recent years, microelectronics technology has entered the era of nanoelectronics/integrated microsystems. System in package (SiP) and system on chip (SoC) are two important technical approaches for realization Deep learning based neural networks is used graphics images. Computer vision target recognition widely used. The deep convolutional network an research field miniaturization embedded platforms. How to combine lightweight with microsystem achieve optimal balance performance, size, power consumption a difficult point. This article introduces micro-system implementation scheme that combines SiP FPGA-based network. It uses Zynq SoC FLASH DDR3 memory as main components, high-density packaging integrate. PL end (FPGA) design Convolutional Neural Network, accelerator, adopt method convolution multi-dimensional division cyclic block accelerator structure, multiple multiplication addition parallel computing units provide system. Improving accelerating perform YOLOv2_Tiny model. test COCO data set training samples. can accurately identify target. volume only 30 × 1.2 mm. performance reaches 22.09GOPs 0.81 W under working frequency 150 MHz. Multi-objective (performance, size consumption) Microsystems realized.